29 search results - page 6 / 6 » Analyzing Cache Bandwidth on the Intel Core 2 Architecture |
CLUSTER
2006
IEEE
14 years 1 months ago
2006
IEEE
As new processor and memory architectures advance, clusters start to be built from larger SMP systems, which makes MPI intra-node communication a critical issue in high performanc...
ICASSP
2011
IEEE
12 years 11 months ago
2011
IEEE
The acceleration of acoustic likelihood calculation has been an important research issue for developing practical speech recognition systems. And there are various specification ...
PDP
2010
IEEE
13 years 11 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...