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PLDI
2012
ACM
13 years 7 months ago
Parallelizing top-down interprocedural analyses
Modularity is a central theme in any scalable program analysis. The core idea in a modular analysis is to build summaries at procedure boundaries, and use the summary of a procedu...
Aws Albarghouthi, Rahul Kumar, Aditya V. Nori, Sri...
175
Voted
CODES
2004
IEEE
15 years 8 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
MTV
2005
IEEE
100views Hardware» more  MTV 2005»
15 years 10 months ago
A Study of Architecture Description Languages from a Model-based Perspective
Abstract— Owing to the recent trend of using applicationspecific instruction-set processors (ASIP), many Architecture Description Languages (ADLs) have been created. They specif...
Wei Qin, Sharad Malik
233
Voted
OOPSLA
2009
Springer
15 years 11 months ago
Static extraction and conformance analysis of hierarchical runtime architectural structure using annotations
An object diagram makes explicit the object structures that are only implicit in a class diagram. An object diagram may be missing and must extracted from the code. Alternatively,...
Marwan Abi-Antoun, Jonathan Aldrich
124
Voted
ISCA
2007
IEEE
106views Hardware» more  ISCA 2007»
15 years 11 months ago
Architectural implications of brick and mortar silicon manufacturing
We introduce a novel chip fabrication technique called “brick and mortar”, in which chips are made from small, pre-fabricated ASIC bricks and bonded in a designer-specified a...
Martha Mercaldi Kim, Mojtaba Mehrara, Mark Oskin, ...