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» Anatomy of high-performance matrix multiplication
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ICCD
2005
IEEE
246views Hardware» more  ICCD 2005»
14 years 4 months ago
H-SIMD Machine: Configurable Parallel Computing for Matrix Multiplication
FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of dataintensive applications [1, 2]. However, mapping algorithms onto multimillion-...
Xizhen Xu, Sotirios G. Ziavras
FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
14 years 1 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna
IPPS
2006
IEEE
14 years 1 months ago
Algorithm-based checkpoint-free fault tolerance for parallel matrix computations on volatile resources
As the desire of scientists to perform ever larger computations drives the size of today’s high performance computers from hundreds, to thousands, and even tens of thousands of ...
Zizhong Chen, Jack Dongarra
IAJIT
2011
13 years 2 months ago
Blocked-based sparse matrix-vector multiplication on distributed memory parallel computers
: The present paper discusses the implementations of sparse matrix-vector products, which are crucial for high performance solutions of large-scale linear equations, on a PC-Cluste...
Rukhsana Shahnaz, Anila Usman
ICASSP
2011
IEEE
12 years 11 months ago
Novel hierarchical ALS algorithm for nonnegative tensor factorization
The multiplicative algorithms are well-known for nonnegative matrix and tensor factorizations. The ALS algorithm for canonical decomposition (CP) has been proved as a “workhorse...
Anh Huy Phan, Andrzej Cichocki, Kiyotoshi Matsuoka...