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ICCAD
1994
IEEE
65views Hardware» more  ICCAD 1994»
15 years 10 months ago
Incremental formal design verification
Language containment is a method for design verification that involves checking if the behavior of the system to be verified is a subset of the behavior of the specifications (pro...
Gitanjali Swamy, Robert K. Brayton
215
Voted
CAV
1994
Springer
113views Hardware» more  CAV 1994»
15 years 10 months ago
A Determinizable Class of Timed Automata
We introduce event-recording automata. An event-recording automaton is a timed automaton that contains, for every event a, a clock that records the time of the last occurrence of a...
Rajeev Alur, Limor Fix, Thomas A. Henzinger
COOPIS
2004
IEEE
15 years 10 months ago
Learning Classifiers from Semantically Heterogeneous Data
Semantically heterogeneous and distributed data sources are quite common in several application domains such as bioinformatics and security informatics. In such a setting, each dat...
Doina Caragea, Jyotishman Pathak, Vasant Honavar
CODES
2006
IEEE
15 years 10 months ago
Increasing hardware efficiency with multifunction loop accelerators
To meet the conflicting goals of high-performance low-cost embedded systems, critical application loop nests are commonly executed on specialized hardware accelerators. These loop...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
RTAS
1997
IEEE
15 years 9 months ago
Efficient Run-Time Monitoring of Timing Constraints
A real-time system operates under timing constraints which it may be unable to meet under some circumstances. The criticality of a timing constraint determines how a system is to ...
Aloysius K. Mok, Guangtian Liu