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» Application of Reduce Order Modeling to Time Parallelization
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ISCAPDCS
2007
13 years 9 months ago
Evaluation of architectural support for speech codecs application in large-scale parallel machines
— Next generation multimedia mobile phones that use the high bandwidth 3G cellular radio network consume more power. Multimedia algorithms such as speech, video transcodecs have ...
Naeem Zafar Azeemi
CODES
2006
IEEE
13 years 11 months ago
Phase guided sampling for efficient parallel application simulation
Simulating chip-multiprocessor systems (CMP) can take a long time. For single-threaded workloads, earlier work has shown the utility of phase analysis, that is identification of r...
Jeffrey Namkung, Dohyung Kim, Rajesh K. Gupta, Igo...
CCGRID
2010
IEEE
13 years 5 months ago
Low-Cost Tuning of Two-Step Algorithms for Scheduling Mixed-Parallel Applications onto Homogeneous Clusters
Due to the strong increase of processing units available to the end user, expressing parallelism of an algorithm is a major challenge for many researchers. Parallel applications ar...
Sascha Hunold
ANSS
2007
IEEE
13 years 11 months ago
An Accurate and Efficient Time-Division Parallelization of Cycle Accurate Architectural Simulators
This paper proposes a parallel cycle-accurate microarchitectural simulator which efficiently executes its workload by splitting the simulation process along time-axis into many in...
Masahiro Yano, Toru Takasaki, Takashi Nakada, Hiro...
ECRTS
2008
IEEE
14 years 2 months ago
Temporal Analysis for Adapting Concurrent Applications to Embedded Systems
Embedded services and applications that interact with the real world often, over time, need to run on different kinds of hardware (low-cost microcontrollers to powerful multicore ...
Sibin Mohan, Johannes Helander