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» Application of Reduce Order Modeling to Time Parallelization
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ICS
1999
Tsinghua U.
13 years 12 months ago
Improving memory hierarchy performance for irregular applications
The performance of irregular applications on modern computer systems is hurt by the wide gap between CPU and memory speeds because these applications typically underutilize multi-...
John M. Mellor-Crummey, David B. Whalley, Ken Kenn...
ICCD
2003
IEEE
115views Hardware» more  ICCD 2003»
14 years 4 months ago
Reducing Compilation Time Overhead in Compiled Simulators
Compiled simulation is a well known technique for improving the performance of instruction set simulators at the cost of compilation time. However the compilation time overhead ma...
Mehrdad Reshadi, Nikil D. Dutt
ILP
2005
Springer
14 years 1 months ago
Strategies to Parallelize ILP Systems
Abstract. It is well known by Inductive Logic Programming (ILP) practioners that ILP systems usually take a long time to find valuable models (theories). The problem is specially ...
Nuno A. Fonseca, Fernando M. A. Silva, Rui Camacho
DATE
2010
IEEE
157views Hardware» more  DATE 2010»
14 years 24 days ago
RMOT: Recursion in model order for task execution time estimation in a software pipeline
Abstract—This paper addresses the problem of execution time estimation for tasks in a software pipeline independent of the application structure or the underlying architecture. A...
Nabeel Iqbal, M. A. Siddique, Jörg Henkel
ICNC
2009
Springer
14 years 2 months ago
Reducing Boarding Time: Synthesis of Improved Genetic Algorithms
—With the aim to minimize boarding time and devise procedures for boarding strategies, this paper develop the synthesis of Improved Genetic Algorithms and simulation. This paper ...
Kang Wang