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» Application of Reduce Order Modeling to Time Parallelization
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106
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IV
2005
IEEE
149views Visualization» more  IV 2005»
15 years 8 months ago
Visualisation Techniques for Users and Designers of Layout Algorithms
Visualisation systems consisting of a set of components through which data and interaction commands flow have been explored by a number of researchers. Such hybrid and multistage ...
Greg Ross, Alistair Morrison, Matthew Chalmers
ISQED
2003
IEEE
113views Hardware» more  ISQED 2003»
15 years 7 months ago
Using Integer Equations for High Level Formal Verification Property Checking
This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verificatio...
Bijan Alizadeh, Mohammad Reza Kakoee
JGTOOLS
2008
189views more  JGTOOLS 2008»
15 years 2 months ago
Subtractive Shadows: A Flexible Framework for Shadow Level of Detail
Abstract. We explore the implications of reversing the process of shadow computation for real-time applications that model complex reflectance and lighting (such as that specified ...
Christopher DeCoro, Szymon Rusinkiewicz
131
Voted
CCGRID
2002
IEEE
15 years 7 months ago
Overcoming the Problems Associated with the Existence of Too Many DSM APIs
Despite the large research efforts in the SW–DSM community, this technology has not yet been adapted widely for significant codes beyond benchmark suites. One of the reasons co...
Martin Schulz
138
Voted
IPPS
2007
IEEE
15 years 9 months ago
Pseudo Trust: Zero-Knowledge Based Authentication in Anonymous Peer-to-Peer Protocols
Most of the current trust models in peer-to-peer (P2P) systems are identity based, which means that in order for one peer to trust another, it needs to know the other peer’s ide...
Li Lu, Jinsong Han, Lei Hu, Jinpeng Huai, Yunhao L...