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ISVLSI
2007
IEEE
131views VLSI» more  ISVLSI 2007»
14 years 2 months ago
Improving the Quality of Bounded Model Checking by Means of Coverage Estimation
Formal verification has become an important step in circuit and system design. A prominent technique is Bounded Model Checking (BMC) which is widely used in industry. In BMC it i...
Ulrich Kühne, Daniel Große, Rolf Drechs...
FPGA
2007
ACM
153views FPGA» more  FPGA 2007»
14 years 2 months ago
Variation-aware routing for FPGAs
Chip design in the nanometer regime is becoming increasingly difficult due to process variations. ASIC designers have adopted statistical optimization techniques to mitigate the e...
Satish Sivaswamy, Kia Bazargan
GLVLSI
2006
IEEE
98views VLSI» more  GLVLSI 2006»
14 years 2 months ago
Rapid intermodulation distortion estimation in fully balanced weakly nonlinear Gm-C filters using state-space modeling
State-space modeling of fully differential Gm-C filters with weak nonlinearities is used to develop a fast algorithm for intermodulation distortion estimation. It results in sim...
Paul Sotiriadis, Abdullah Celik, Zhaonian Zhang
ASPDAC
2006
ACM
166views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Temperature-aware routing in 3D ICs
Three-dimensional integrated circuits (3D ICs) provide an attractive solution for improving circuit performance. Such solutions must be embedded in an electrothermally-conscious d...
Tianpei Zhang, Yong Zhan, Sachin S. Sapatnekar
ISPD
2006
ACM
103views Hardware» more  ISPD 2006»
14 years 2 months ago
High accurate pattern based precondition method for extremely large power/ground grid analysis
In this paper, we propose more accurate power/ground network circuit model, which consider both via and ground bounce effects to improve the performance estimation accuracy of on-...
Jin Shi, Yici Cai, Sheldon X.-D. Tan, Xianlong Hon...