Formal verification has become an important step in circuit and system design. A prominent technique is Bounded Model Checking (BMC) which is widely used in industry. In BMC it i...
Chip design in the nanometer regime is becoming increasingly difficult due to process variations. ASIC designers have adopted statistical optimization techniques to mitigate the e...
State-space modeling of fully differential Gm-C filters with weak nonlinearities is used to develop a fast algorithm for intermodulation distortion estimation. It results in sim...
Three-dimensional integrated circuits (3D ICs) provide an attractive solution for improving circuit performance. Such solutions must be embedded in an electrothermally-conscious d...
In this paper, we propose more accurate power/ground network circuit model, which consider both via and ground bounce effects to improve the performance estimation accuracy of on-...
Jin Shi, Yici Cai, Sheldon X.-D. Tan, Xianlong Hon...