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CORR
2006
Springer
112views Education» more  CORR 2006»
13 years 8 months ago
High-level synthesis under I/O Timing and Memory constraints
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper...
Philippe Coussy, Gwenolé Corre, Pierre Bome...
CN
2007
97views more  CN 2007»
13 years 8 months ago
Security enhancement of an IC-card-based remote login mechanism
Wang et al. presented a remote password authentication scheme using IC (Integrated Circuit) cards in 2004. Unfortunately, we discovered that their scheme is unable to withstand th...
Ting-Fang Cheng, Jung-San Lee, Chin-Chen Chang
IJON
2006
73views more  IJON 2006»
13 years 8 months ago
Selective attention implemented with dynamic synapses and integrate-and-fire neurons
Selective attention is a process widely used by biological sensory systems to overcome the problem of limited parallel processing capacity: salient subregions of the input stimuli...
Chiara Bartolozzi, Giacomo Indiveri
FTEDA
2007
78views more  FTEDA 2007»
13 years 7 months ago
Design Automation of Real-Life Asynchronous Devices and Systems
The number of gates on a chip is quickly growing toward and beyond the one billion mark. Keeping all the gates running at the beat of a single or a few rationally related clocks i...
Alexander Taubin, Jordi Cortadella, Luciano Lavagn...
TCAD
2008
133views more  TCAD 2008»
13 years 7 months ago
Metal-Density-Driven Placement for CMP Variation and Routability
In this paper, we propose the first metal-density driven placement algorithm to reduce CMP variation and achieve higher routability. Based on an analytical placement framework, we...
Tung-Chieh Chen, Minsik Cho, David Z. Pan, Yao-Wen...