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136
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DAC
2005
ACM
15 years 4 months ago
Partitioning-based approach to fast on-chip decap budgeting and minimization
This paper proposes a fast decoupling capacitance (decap) allocation and budgeting algorithm for both early stage decap estimation and later stage decap minimization in today’s ...
Hang Li, Zhenyu Qi, Sheldon X.-D. Tan, Lifeng Wu, ...
136
Voted
USS
2004
15 years 4 months ago
Tor: The Second-Generation Onion Router
We present Tor, a circuit-based low-latency anonymous communication service. This second-generation Onion Routing system addresses limitations in the original design by adding per...
Roger Dingledine, Nick Mathewson, Paul F. Syverson
117
Voted
TVLSI
2008
139views more  TVLSI 2008»
15 years 2 months ago
Ternary CAM Power and Delay Model: Extensions and Uses
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
Banit Agrawal, Timothy Sherwood
121
Voted
DAC
2007
ACM
16 years 3 months ago
Voltage-Frequency Island Partitioning for GALS-based Networks-on-Chip
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single gl...
Ümit Y. Ogras, Diana Marculescu, Puru Choudha...
95
Voted
DAC
2005
ACM
16 years 3 months ago
Automated nonlinear Macromodelling of output buffers for high-speed digital applications
We present applications of a recently developed automated nonlinear macromodelling approach to the important problem of macromodelling high-speed output buffers/drivers. Good nonl...
Ning Dong, Jaijeet S. Roychowdhury