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    CSREAESA
    2004
    158views Embedded Systems» more  CSREAESA 2004»
    CMOS Implementation of Phase-Encoded Complex-Valued Artificial Neural Networks
    13 years 9 months ago
    CMOS Implementation of Phase-Encoded Complex-Valued Artificial Neural Networks
    Download  www.ece.umassd.edu
    - The model of a simple perceptron using phase-encoded inputs and complex-valued weights is presented. Multilayer two-input and three-input complex-valued neurons (CVNs) are implem...
    Howard E. Michel, David Rancour, Sushanth Iringent...
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    FPGA
    2008
    ACM
    168views FPGA» more  FPGA 2008»
    Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs
    13 years 9 months ago
    Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs
    Download  lap.epfl.ch
    The Field Programmable Counter Array (FPCA) was introduced to improve FPGA performance for arithmetic circuits. An FPCA is a reconfigurable IP core that can be integrated into an ...
    Alessandro Cevrero, Panagiotis Athanasopoulos, Had...
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    DAC
    2007
    ACM
    131views Computer Architecture» more  DAC 2007»
    Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop
    14 years 9 months ago
    Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop
    Download  cobweb.ecn.purdue.edu
    This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
    Kunhyuk Kang, Kee-Jong Kim, Kaushik Roy
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    DAC
    2003
    ACM
    160views Computer Architecture» more  DAC 2003»
    Analog and RF circuit macromodels for system-level analysis
    14 years 9 months ago
    Analog and RF circuit macromodels for system-level analysis
    Download  www.ece.cmu.edu
    Design and validation of mixed-signal integrated systems require evel model abstractions. Generalized Volterra series based models have been successfully applied for analog and RF...
    Xin Li, Peng Li, Yang Xu, Lawrence T. Pileggi
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    ISLPED
    2009
    ACM
    168views Hardware» more  ISLPED 2009»
    Low power circuit design based on heterojunction tunneling transistors (HETTs)
    14 years 2 months ago
    Low power circuit design based on heterojunction tunneling transistors (HETTs)
    Download  www.eecs.umich.edu
    The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
    Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
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