11 search results - page 1 / 3 » Application-adaptive intelligent cache memory system |
TECS
2002
13 years 10 months ago
2002
DELTA
2008
IEEE
14 years 28 days ago
2008
IEEE
As semiconductor technology advances, the performance gap between processor and memory has become one of the major issues in computer design. In order to bridge this gap, many met...
TVLSI
2010
13 years 5 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
EVOW
2011
Springer
13 years 2 months ago
2011
Springer
Abstract. Electronic embedded systems designers aim at finding a tradeoff between cost and power consumption. As cache memory management has been shown to have a significant imp...
IPPS
2006
IEEE
14 years 5 months ago
2006
IEEE
This paper presents a helper thread prefetching scheme that is designed to work on loosely-coupled processors, such as in a standard chip multi-processor (CMP) system and in an in...