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ISCA
2012
IEEE
302views Hardware» more  ISCA 2012»
11 years 9 months ago
Scale-out processors
The emergence of global-scale online services has galvanized scale-out software, characterized by splitting vast datasets and massive computation across many independent servers. ...
Pejman Lotfi-Kamran, Boris Grot, Michael Ferdman, ...
DATE
2004
IEEE
146views Hardware» more  DATE 2004»
13 years 11 months ago
Analyzing On-Chip Communication in a MPSoC Environment
This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-proc...
Mirko Loghi, Federico Angiolini, Davide Bertozzi, ...
CASES
2005
ACM
13 years 9 months ago
Hardware support for code integrity in embedded processors
Computer security becomes increasingly important with continual growth of the number of interconnected computing platforms. Moreover, as capabilities of embedded processors increa...
Milena Milenkovic, Aleksandar Milenkovic, Emil Jov...
CDES
2008
90views Hardware» more  CDES 2008»
13 years 8 months ago
Nanocompilation for the Cell Matrix Architecture
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...
Thomas Way, Rushikesh Katikar, Ch. Purushotham
IISWC
2008
IEEE
14 years 1 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li