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WWW
2005
ACM
14 years 8 months ago
Design for verification for asynchronously communicating Web services
We present a design for verification approach to developing reliable web services. We focus on composite web services which consist of asynchronously communicating peers. Our goal...
Aysu Betin-Can, Tevfik Bultan, Xiang Fu
VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
14 years 7 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng
EMSOFT
2006
Springer
13 years 9 months ago
Reusable models for timing and liveness analysis of middleware for distributed real-time and embedded systems
Distributed real-time and embedded (DRE) systems have stringent constraints on timeliness and other properties whose assurance is crucial to correct system behavior. Formal tools ...
Venkita Subramonian, Christopher D. Gill, Cé...
DAC
1997
ACM
13 years 11 months ago
Formal Verification of FIRE: A Case Study
We present our experiences with the formal verification of an automotive chip used to control the safety features in a car. We used a BDD based model checker in our work. We descr...
Jae-Young Jang, Shaz Qadeer, Matt Kaufmann, Carl P...
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
14 years 4 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna