We previously presented a fault localization technique called Value Replacement that repeatedly alters the state of an executing program to locate a faulty statement [9]. The tech...
We present a tool for the design and validation of embedded real-time applications. The tool integrates two approaches, the use of the synchronous programming language ESTEREL for...
Interest in synthesis of Application Specific Instruction Set Processors or ASIPs has increased considerably and a number of methodologies have been proposed for ASIP design. A ke...
Manoj Kumar Jain, Lars Wehmeyer, Stefan Steinke, P...
An interprocedural flow analysis can justify inlining in higher-order languages. In principle, more inlining can be performed as analysis accuracy improves. This paper compares fo...
Abstract. The following problem will be considered: from scattered examples on the behavior of a dynamic system induce a description of the system. For the induced description to b...