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» Applying WCET Analysis at Architectural Level
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RTSS
2008
IEEE
14 years 4 months ago
Merging State and Preserving Timing Anomalies in Pipelines of High-End Processors
Many embedded systems are subject to temporal constraints that require advance guarantees on meeting deadlines. Such systems rely on static analysis to safely bound worst-case exe...
Sibin Mohan, Frank Mueller
ANLP
1992
100views more  ANLP 1992»
13 years 10 months ago
An Approach To Multilevel Semantics For Applied Systems
Multilevel semantics has been proposed as a powerful architecture for semantic analysis. We propose a methodology that, while maintaining the generality of the multilevel approach...
Alberto Lavelli, Bernardo Magnini, Carlo Strappara...
RTAS
2005
IEEE
14 years 3 months ago
Bounding Worst-Case Data Cache Behavior by Analytically Deriving Cache Reference Patterns
While caches have become invaluable for higher-end architectures due to their ability to hide, in part, the gap between processor speed and memory access times, caches (and partic...
Harini Ramaprasad, Frank Mueller
RTSS
2009
IEEE
14 years 4 months ago
On the Scheduling of Mixed-Criticality Real-Time Task Sets
Abstract—The functional consolidation induced by the costreduction trends in embedded systems can force tasks of different criticality (e.g. ABS Brakes with DVD) to share a proce...
Dionisio de Niz, Karthik Lakshmanan, Ragunathan Ra...
ICPP
1993
IEEE
14 years 1 months ago
Dependence Analysis and Architecture Design for Bit-Level Algorithms
:. In designing application-specific bit-level architectures and in programming existing bit-level processor arrays, it is necessary to expand a word-level algorithm into its bit-...
Weijia Shang, Benjamin W. Wah