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MICRO
2000
IEEE
68views Hardware» more  MICRO 2000»
15 years 7 months ago
Performance improvement with circuit-level speculation
Current superscalar microprocessors’ performance depends on its frequency and the number of useful instructions that can be processed per cycle (IPC). In this paper we propose a...
Tong Liu, Shih-Lien Lu
114
Voted
QUESTA
2007
92views more  QUESTA 2007»
15 years 2 months ago
Estimation for queues from queue length data
We consider the estimation of arrival and service rates for queues based on queue length data collected at successive, not necessarily equally spaced, time points. In particular, ...
J. V. Ross, T. Taimre, Philip K. Pollett
128
Voted
ICASSP
2010
IEEE
15 years 17 days ago
A transient analysis for the convex combination of two adaptive filters with transfer of coefficients
This paper proposes an improved model for the transient of convex combinations of adaptive filters. A previous model, based on a firstorder Taylor series approximation of the nonl...
Magno T. M. Silva, Vitor H. Nascimento, Jeró...
114
Voted
GLOBECOM
2009
IEEE
15 years 11 days ago
Performance Modeling for Heterogeneous Wireless Networks with Multiservice Overflow Traffic
Performance modeling is important for the purpose of developing efficient dimensioning tools for large complicated networks. But it is difficult to achieve in heterogeneous wireles...
Qian Huang, King-Tim Ko, Villy Bæk Iversen
117
Voted
ISCAS
2008
IEEE
122views Hardware» more  ISCAS 2008»
15 years 9 months ago
A nano-CMOS process variation induced read failure tolerant SRAM cell
— In a nanoscale technology, memory bits are highly susceptible to process variation induced read/write failures. To address the above problem, in this paper a new memory cell is...
Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhi...