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HPCA
2009
IEEE
14 years 8 months ago
A novel architecture of the 3D stacked MRAM L2 cache for CMPs
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...
Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yira...
ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
12 years 11 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...
OSDI
2008
ACM
14 years 8 months ago
Greening the Switch
Active research is being conducted in reducing power consumption of all the components of the Internet. To that end, we propose schemes for power reduction in network switches - T...
Ganesh Ananthanarayanan, Randy H. Katz
TVLSI
1998
99views more  TVLSI 1998»
13 years 7 months ago
Some experiments about wave pipelining on FPGA's
— Wave pipelining offers a unique combination of high speed, low latency, and moderate power consumption. The construction of wave pipelines is benefited by the use of gates and...
Eduardo I. Boemo, Sergio López-Buedo, Juan ...
IS
2006
13 years 7 months ago
Adaptive cycle management in soft real-time disk retrieval
The objective of this study is to determine the right cycle management policy to service periodic soft real-time disk retrieval. Cycle based disk scheduling provides an effective ...
Youjip Won, Ilhoon Shin, Kern Koh