We present a transistor level power estimator which exploits algorithms for fast circuit simulation to compute the power dissipation of CMOS circuits. The proposed approach uses s...
Premal Buch, Shen Lin, Vijay Nagasamy, Ernest S. K...
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
Abstract—In wireless networks, monotonic, strictly subhomogeneous functions have been used to analyze power control algorithms. We provide an alternative analysis based on the ob...
In this paper, we introduce a discrete-time model for the complete power supply sub-system that closely approximates the behavior of its circuit-level (i.e., HSpice), continuous-t...
Luca Benini, Giuliano Castelli, Alberto Macii, Enr...
This manuscript introduces a mathematically tractable and accurate model of narrowband power line noise based on experimental measurements. In this paper, the noise is expressed as...