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ISLPED
1995
ACM
80views Hardware» more  ISLPED 1995»
13 years 11 months ago
Techniques for fast circuit simulation applied to power estimation of CMOS circuits
We present a transistor level power estimator which exploits algorithms for fast circuit simulation to compute the power dissipation of CMOS circuits. The proposed approach uses s...
Premal Buch, Shen Lin, Vijay Nagasamy, Ernest S. K...
VLSID
2005
IEEE
89views VLSI» more  VLSID 2005»
14 years 8 months ago
Power Optimization in Current Mode Circuits
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
M. S. Bhat, H. S. Jamadagni
GLOBECOM
2007
IEEE
14 years 1 months ago
Contraction Approach to Power Control, with Non-Monotonic Applications
Abstract—In wireless networks, monotonic, strictly subhomogeneous functions have been used to analyze power control algorithms. We provide an alternative analysis based on the ob...
Carl J. Nuzman
DATE
2000
IEEE
112views Hardware» more  DATE 2000»
14 years 1 days ago
A Discrete-Time Battery Model for High-Level Power Estimation
In this paper, we introduce a discrete-time model for the complete power supply sub-system that closely approximates the behavior of its circuit-level (i.e., HSpice), continuous-t...
Luca Benini, Giuliano Castelli, Alberto Macii, Enr...
JSAC
2006
104views more  JSAC 2006»
13 years 7 months ago
A mathematical model of noise in narrowband power line communication systems
This manuscript introduces a mathematically tractable and accurate model of narrowband power line noise based on experimental measurements. In this paper, the noise is expressed as...
Masaaki Katayama, Takaya Yamazato, Hiraku Okada