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DATE
2010
IEEE
175views Hardware» more  DATE 2010»
13 years 11 months ago
Approximate logic synthesis for error tolerant applications
─ Error tolerance formally captures the notion that – for a wide variety of applications including audio, video, graphics, and wireless communications – a defective chip that...
Doochul Shin, Sandeep K. Gupta
LMCS
2007
132views more  LMCS 2007»
13 years 7 months ago
The Complexity of Model Checking Higher-Order Fixpoint Logic
Higher-Order Fixpoint Logic (HFL) is a hybrid of the simply typed λ-calculus and the modal µ-calculus. This makes it a highly expressive temporal logic that is capable of express...
Roland Axelsson, Martin Lange, Rafal Somla
DSD
2007
IEEE
116views Hardware» more  DSD 2007»
14 years 1 months ago
Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation
This paper focuses on numerical function generators (NFGs) based on k-th order polynomial approximations. We show that increasing the polynomial order k reduces significantly the...
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
ATAL
2005
Springer
14 years 1 months ago
Bounded model checking knowledge and branching time in synchronous multi-agent systems
We present an approach to the verification of temporal epistemic properties in synchronous multi-agent systems (MAS) via bounded model checking (BMC). Based on the semantics of s...
Xiangyu Luo, Kaile Su, Abdul Sattar, Qingliang Che...
PLILP
1998
Springer
13 years 11 months ago
Logic Programming and Model Checking
We report on the current status of the LMC project, which seeks to deploy the latest developments in logic-programming technology to advance the state of the art of system speci ca...
Baoqiu Cui, Yifei Dong, Xiaoqun Du, K. Narayan Kum...