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» Architectural Considerations for Energy Efficiency
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VLSID
2004
IEEE
181views VLSI» more  VLSID 2004»
14 years 11 months ago
Real Time Dynamic Voltage Scaling For Embedded Systems
This paper presents a very efficient and versatile method to handle Dynamic Voltage Scaling for minimizing energy consumption in an embedded system processor while maintaining rea...
Venkat Rao, Gaurav Singhal, Anshul Kumar
ISLPED
2010
ACM
234views Hardware» more  ISLPED 2010»
13 years 8 months ago
Diet SODA: a power-efficient processor for digital cameras
Power has become the most critical design constraint for embedded handheld devices. This paper proposes a power-efficient SIMD architecture, referred to as Diet SODA, for DSP appl...
Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Chait...
ISMVL
2005
IEEE
108views Hardware» more  ISMVL 2005»
14 years 4 months ago
Approaching the Physical Limits of Computing
As logic device sizes shrink towards the nanometer scale, a number of important physical limits threaten to soon halt further improvements in computer performance per unit cost. H...
Michael P. Frank
DAC
2008
ACM
14 years 12 months ago
Energy-optimal software partitioning in heterogeneous multiprocessor embedded systems
Embedded systems with heterogeneous processors extend the energy/timing trade-off flexibility and provide the opportunity to fine tune resource utilization for particular applicat...
Michel Goraczko, Jie Liu, Dimitrios Lymberopoulos,...
ISLPED
2010
ACM
169views Hardware» more  ISLPED 2010»
13 years 8 months ago
Distributed DVFS using rationally-related frequencies and discrete voltage levels
Abstract--As a replacement for the fast-fading GloballySynchronous model, we have defined a flexible design style called GRLS, for Globally-Ratiochronous, Locally-Synchronous, whic...
Jean-Michel Chabloz, Ahmed Hemani