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HPCA
1998
IEEE
14 years 8 days ago
PRISM: An Integrated Architecture for Scalable Shared Memory
This paper describes PRISM, a distributed sharedmemory architecture that relies on a tightly integrated hardware and operating system design for scalable and reliable performance....
Kattamuri Ekanadham, Beng-Hong Lim, Pratap Pattnai...
CASES
2003
ACM
14 years 1 months ago
Architectural optimizations for low-power, real-time speech recognition
The proliferation of computing technology to low power domains such as hand–held devices has lead to increased interest in portable interface technologies, with particular inter...
Rajeev Krishna, Scott A. Mahlke, Todd M. Austin
ICCAD
2001
IEEE
184views Hardware» more  ICCAD 2001»
14 years 4 months ago
CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
Cagdas Akturan, Margarida F. Jacome
TSE
2002
122views more  TSE 2002»
13 years 7 months ago
Virtual Benchmarking and Model Continuity in Prototyping Embedded Multiprocessor Signal Processing Systems
The complexity of hardware/software codesign of embedded real-time signal processing systems can be reduced by rapid system prototyping (RSP). However, existing RSP frameworks do n...
Randall S. Janka, Linda M. Wills, Lewis B. Baumsta...
EUC
2006
Springer
13 years 11 months ago
Data-Layout Optimization Using Reuse Distance Distribution
As the ever-increasing gap between the speed of processor and the speed of memory has become the cause of one of primary bottlenecks of computer systems, modern architecture system...
Xiong Fu, Yu Zhang, Yiyun Chen