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MICRO
2000
IEEE
121views Hardware» more  MICRO 2000»
14 years 5 days ago
Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures
Conventional microarchitectures choose a single memory hierarchy design point targeted at the average application. In this paper, we propose a cache and TLB layout and design that...
Rajeev Balasubramonian, David H. Albonesi, Alper B...
ASPLOS
2008
ACM
13 years 10 months ago
Hardbound: architectural support for spatial safety of the C programming language
The C programming language is at least as well known for its absence of spatial memory safety guarantees (i.e., lack of bounds checking) as it is for its high performance. C'...
Joe Devietti, Colin Blundell, Milo M. K. Martin, S...
MKWI
2008
160views Business» more  MKWI 2008»
13 years 10 months ago
Architectural Design of Flexible Process Management Technology
: To provide effective support, process-aware information systems (PAIS) must not freeze existing business processes. Instead they should enable authorized users to deviate on-the-...
Manfred Reichert, Peter Dadam, Martin Jurisch, Ulr...
IEEEPACT
2002
IEEE
14 years 1 months ago
Software Bubbles: Using Predication to Compensate for Aliasing in Software Pipelines
This paper describes a technique for utilizing predication to support software pipelining on EPIC architectures in the presence of dynamic memory aliasing. The essential idea is t...
Benjamin Goldberg, Emily Crutcher, Chad Huneycutt,...
ASPLOS
2008
ACM
13 years 10 months ago
The mapping collector: virtual memory support for generational, parallel, and concurrent compaction
Parallel and concurrent garbage collectors are increasingly employed by managed runtime environments (MREs) to maintain scalability, as multi-core architectures and multi-threaded...
Michal Wegiel, Chandra Krintz