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WOMPAT
2001
Springer
14 years 1 months ago
A Study of Implicit Data Distribution Methods for OpenMP Using the SPEC Benchmarks
In contrast to the common belief that OpenMP requires data-parallel extensions to scale well on architectures with non-uniform memory access latency, recent work has shown that it ...
Dimitrios S. Nikolopoulos, Eduard Ayguadé
DATE
2005
IEEE
104views Hardware» more  DATE 2005»
14 years 2 months ago
Queue Management in Network Processors
: - One of the main bottlenecks when designing a network processing system is very often its memory subsystem. This is mainly due to the state-of-the-art network links operating at...
Ioannis Papaefstathiou, Theofanis Orphanoudakis, G...
ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
14 years 27 days ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
PPL
2008
117views more  PPL 2008»
13 years 8 months ago
Operating Systems in silicon and the Dynamic Management of Resources in Many-Core Chips
This discussion paper explores the problems of operating systems support when implementing concurrency controls at the level of the instruction set in processors designed for mult...
Chris R. Jesshope
MICRO
2010
IEEE
189views Hardware» more  MICRO 2010»
13 years 6 months ago
A Dynamically Adaptable Hardware Transactional Memory
Most Hardware Transactional Memory (HTM) implementations choose fixed version and conflict management policies at design time. While eager HTM systems store transactional state in-...
Marc Lupon, Grigorios Magklis, Antonio Gonzá...