Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
Victor Delaluz, Anand Sivasubramaniam, Mahmut T. K...
As semiconductor technology advances, the performance gap between processor and memory has become one of the major issues in computer design. In order to bridge this gap, many met...
This work presents several approaches for designing the memory management component of self stabilizing operating systems. We state the requirements which a memory manager should ...
Abstract— In an effort to make processors more power efficient scratch pad memory (SPM) have been proposed instead of caches, which can consume majority of processor power. Howe...
Arun Kannan, Aviral Shrivastava, Amit Pabalkar, Jo...
The role of the operating system (OS) in managing shared resources such as CPU time, memory, peripherals, and even energy is well motivated and understood [23]. Unfortunately, one...