129 search results - page 19 / 26 » Architectural Support for the Stream Execution Model on Gene... |
MICRO
2006
IEEE
14 years 2 months ago
2006
IEEE
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
VLDB
1992
ACM
14 years 19 days ago
1992
ACM
This paper evaluates the performance of the parallel, main-memory DBMS, PRISMA/DB. First, an architecture for parallel query execution is presented. A performance model for the ex...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
ISCA
2002
IEEE
14 years 1 months ago
2002
IEEE
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
DSRT
2008
IEEE
13 years 10 months ago
2008
IEEE
In this contribution a new system for the rapid development of real-time prototypes for digital audio signal processing algorithms on Windows PCs and a Digital Signal Processor (D...