Sciweavers

159 search results - page 24 / 32
» Architectural Synthesis of Timed Asynchronous Systems
Sort
View
INTEGRATION
2008
183views more  INTEGRATION 2008»
13 years 7 months ago
Network-on-Chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...
CSE
2009
IEEE
14 years 2 months ago
Implementing Social Norms Using Policies
—Multi-agent systems are difficult to develop. One reason for this is that agents are embedded in a society where all agents must agree to obey certain social norms in order for...
Robert Kremer
LCTRTS
2001
Springer
13 years 12 months ago
ILP-based Instruction Scheduling for IA-64
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
Daniel Kästner, Sebastian Winkel
TMC
2011
182views more  TMC 2011»
13 years 2 months ago
Dynamic Time Slot Partitioning for Multimedia Transmission in Two-Hop Cellular Networks
—In recent years, there has been an exponential increase in the number of mobile phone users. In addition, a significant growth in the demand for high-rate multimedia services o...
Hrishikesh Venkataraman, Gabriel-Miro Muntean
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
14 years 1 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil