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» Architectural Synthesis of Timed Asynchronous Systems
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TC
2002
13 years 8 months ago
The Timely Computing Base Model and Architecture
Abstract-- Current systems are very often based on largescale, unpredictable and unreliable infrastructures. However, users of these systems increasingly require services with time...
Paulo Veríssimo, Antonio Casimiro
SBCCI
2006
ACM
171views VLSI» more  SBCCI 2006»
14 years 2 months ago
Asynchronous circuit design on reconfigurable devices
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
R. U. R. Mocho, G. H. Sartori, Renato P. Ribas, An...
ISSS
2000
IEEE
144views Hardware» more  ISSS 2000»
14 years 29 days ago
Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha
ASPDAC
2007
ACM
135views Hardware» more  ASPDAC 2007»
14 years 18 days ago
Architectural Optimizations for Text to Speech Synthesis in Embedded Systems
Abstract-- The increasing processing power of embedded devices have created the scope for certain applications that could previously be executed in desktop environments only, to mi...
Soumyajit Dey, Monu Kedia, Anupam Basu
AINA
2003
IEEE
14 years 1 months ago
Server Scheduling Scheme for Asynchronous Cluster Video Server
In this paper, we propose an asynchronous cluster video server architecture, which is quite different from synchronous video server architecture in various aspects such as stripin...
Jianhua Sun, Hai Jin, Hao Chen, Zongfen Han