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SAC
2006
ACM
14 years 1 months ago
Hardware/software 2D-3D backprojection on a SoPC platform
The reduction of image reconstruction time is needed to spread the use of PET for research and routine clinical practice. In this purpose, this article presents a hardware/softwar...
Nicolas Gac, Stéphane Mancini, Michel Desvi...
AAAI
1990
13 years 9 months ago
The Design of a Marker Passing Architecture for Knowledge Processing
Knowledge processing is very demanding on computer architectures. Knowledge processing generates subcomputation paths at an exponential rate. It is memory intensive and has high c...
Wing Lee, Dan I. Moldovan
FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
14 years 3 days ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
JSA
2000
116views more  JSA 2000»
13 years 7 months ago
Distributed vector architectures
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
Stefanos Kaxiras
AOSE
2007
Springer
14 years 2 months ago
Developing a Multiagent Conference Management System Using the O-MaSE Process Framework
This paper describes how the Organization-based Multiagent Systems Engineering (O-MaSE) methodology can be applied to an exemplar multiagent system, the Conference Management Syste...
Scott A. DeLoach