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» Architectural dependability evaluation with Arcade
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ISCA
2006
IEEE
142views Hardware» more  ISCA 2006»
14 years 1 months ago
Bulk Disambiguation of Speculative Threads in Multiprocessors
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
Luis Ceze, James Tuck, Josep Torrellas, Calin Casc...
IWCMC
2006
ACM
14 years 1 months ago
Tracers placement for IP traceback against DDoS attacks
This paper explores the tracers deployment problem for IP traceback methods how many and where the tracers should be deployed in the network to be effective for locating the attac...
Chun-Hsin Wang, Chang-Wu Yu, Chiu-Kuo Liang, Kun-M...
SIGCOMM
2006
ACM
14 years 1 months ago
XORs in the air: practical wireless network coding
— This paper proposes COPE, a new architecture for wireless mesh networks. In addition to forwarding packets, routers mix (i.e., code) packets from different sources to increase ...
Sachin Katti, Hariharan Rahul, Wenjun Hu, Dina Kat...
ICS
2005
Tsinghua U.
14 years 27 days ago
Transparent caching with strong consistency in dynamic content web sites
We consider a cluster architecture in which dynamic content is generated by a database back-end and a collection of Web and application server front-ends. We study the effect of t...
Cristiana Amza, Gokul Soundararajan, Emmanuel Cecc...
CHES
2004
Springer
121views Cryptology» more  CHES 2004»
14 years 24 days ago
Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure?
Since their publication in 1998, power analysis attacks have attracted significant attention within the cryptographic community. So far, they have been successfully applied to di...
François-Xavier Standaert, Siddika Berna &O...