Sciweavers

271 search results - page 46 / 55
» Architectural dependability evaluation with Arcade
Sort
View
MICRO
2008
IEEE
119views Hardware» more  MICRO 2008»
14 years 1 months ago
The StageNet fabric for constructing resilient multicore systems
Scaling of CMOS feature size has long been a source of dramatic performance gains. However, the reduction in voltage levels has not been able to match this rate of scaling, leadin...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason ...
LCTRTS
2007
Springer
14 years 1 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
IEEEPACT
2006
IEEE
14 years 1 months ago
Complexity-based program phase analysis and classification
Modeling and analysis of program behavior are at the foundation of computer system design and optimization. As computer systems become more adaptive, their efficiency increasingly...
Chang-Burm Cho, Tao Li
IPPS
2006
IEEE
14 years 1 months ago
Conjugate gradient sparse solvers: performance-power characteristics
We characterize the performance and power attributes of the conjugate gradient (CG) sparse solver which is widely used in scientific applications. We use cycle-accurate simulatio...
Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary ...
SENSYS
2006
ACM
14 years 1 months ago
Virtual high-resolution for sensor networks
The resolution at which a sensor network collects data is a crucial parameter of performance since it governs the range of applications that are feasible to be developed using tha...
Aman Kansal, William J. Kaiser, Gregory J. Pottie,...