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» Architectural descriptions for FPGA circuits
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ECOOP
2008
Springer
13 years 9 months ago
Liquid Metal: Object-Oriented Programming Across the Hardware/Software Boundary
Abstract. The paradigm shift in processor design from monolithic processors to multicore has renewed interest in programming models that facilitate parallelism. While multicores ar...
Shan Shan Huang, Amir Hormati, David F. Bacon, Rod...
DATE
2009
IEEE
171views Hardware» more  DATE 2009»
14 years 2 months ago
Automatic generation of streaming datapaths for arbitrary fixed permutations
Abstract—This paper presents a technique to perform arbitrary fixed permutations on streaming data. We describe a parameterized architecture that takes as input n data points st...
Peter A. Milder, James C. Hoe, Markus Püschel
DATE
2006
IEEE
89views Hardware» more  DATE 2006»
14 years 1 months ago
Automatic insertion of low power annotations in RTL for pipelined microprocessors
We propose instruction-driven slicing, a new technique for annotating microprocessor descriptions at the Register Transfer Level (RTL) in order to achieve lower power dissipation....
Vinod Viswanath, Jacob A. Abraham, Warren A. Hunt ...
VTC
2006
IEEE
117views Communications» more  VTC 2006»
14 years 1 months ago
Design and Implementation of Robust Time/Frequency Offset Tracking Algorithm for MIMO-OFDM Receivers
— In this paper, the robust time and frequency offset tracking algorithms and architecture for high throughput wireless local area network (WLAN) systems are presented. The desig...
Il-Gu Lee, Heejung Yu, Eunyoung Choi, Jungbo Son, ...
ICCAD
2006
IEEE
111views Hardware» more  ICCAD 2006»
14 years 4 months ago
Mapping arbitrary logic functions into synchronous embedded memories for area reduction on FPGAs
This work describes a new mapping technique, RAM-MAP, that identifies parts of circuits that can be efficiently mapped into the synchronous embedded memories found on field prog...
Gordon R. Chiu, Deshanand P. Singh, Valavan Manoha...