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» Architectural requirements of parallel computational biology...
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HPCA
2006
IEEE
14 years 2 months ago
Increasing the cache efficiency by eliminating noise
Caches are very inefficiently utilized because not all the excess data fetched into the cache, to exploit spatial locality, is utilized. We define cache utilization as the percent...
Prateek Pujara, Aneesh Aggarwal
VLSID
2009
IEEE
108views VLSI» more  VLSID 2009»
14 years 9 months ago
Metric Based Multi-Timescale Control for Reducing Power in Embedded Systems
Abstract--Digital control for embedded systems often requires low-power, hard real-time computation to satisfy high control-loop bandwidth, low latency, and low-power requirements....
Forrest Brewer, João Pedro Hespanha, Nitin ...
IPPS
2010
IEEE
13 years 6 months ago
On the parallelisation of MCMC-based image processing
Abstract--The increasing availability of multi-core and multiprocessor architectures provides new opportunities for improving the performance of many computer simulations. Markov C...
Jonathan M. R. Byrd, Stephen A. Jarvis, Abhir H. B...
CISS
2008
IEEE
14 years 3 months ago
Distributed processing in frames for sparse approximation
—Beyond signal processing applications, frames are also powerful tools for modeling the sensing and information processing of many biological and man-made systems that exhibit in...
Christopher J. Rozell
JCST
2008
140views more  JCST 2008»
13 years 8 months ago
ROPAS: Cross-Layer Cognitive Architecture for Mobile UWB Networks
The allocation of bandwidth to unlicensed users, without significantly increasing the interference on the existing licensed users, is a challenge for Ultra Wideband (UWB) networks....
Chittabrata Ghosh, Bin Xie, Dharma P. Agrawal