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WCRE
2006
IEEE
15 years 9 months ago
An Orchestrated Multi-view Software Architecture Reconstruction Environment
Most approaches in reverse engineering literature generate a single view of a software system that restricts the scope of the reconstruction process. We propose an orchestrated se...
Kamran Sartipi, Nima Dezhkam, Hossein Safyallah
117
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CONEXT
2005
ACM
15 years 5 months ago
Janus: an architecture for flexible access to sensor networks
We present the design and implementation of the Janus1 architecture for providing flexible and lightweight access to sensor network resources from Internet-type networks. Janus p...
Richard Gold
115
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RTSS
2007
IEEE
15 years 9 months ago
A UML-Based Design Framework for Time-Triggered Applications
Time-triggered architectures (TTAs) are strong candidate platforms for safety-critical real-time applications. A typical time-triggered architecture is constituted by one or more ...
Kathy Dang Nguyen, P. S. Thiagarajan, Weng-Fai Won...
FCCM
2006
IEEE
101views VLSI» more  FCCM 2006»
15 years 9 months ago
A Type Architecture for Hybrid Micro-Parallel Computers
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...
Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
137
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SBCCI
2003
ACM
213views VLSI» more  SBCCI 2003»
15 years 8 months ago
Algorithms and Tools for Network on Chip Based System Design
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
Tang Lei, Shashi Kumar