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ISCAS
1993
IEEE
125views Hardware» more  ISCAS 1993»
14 years 2 months ago
A VLSI Implementation of a Cascade Viterbi Decoder with Traceback
- A novel VLSI implementation of the Viterbi algorithm based on a cascade architecture is presented. Survivor sequence memory management is implemented using a new single read poin...
Gennady Feygin, Paul Chow, P. Glenn Gulak, John Ch...
ISCAS
2006
IEEE
116views Hardware» more  ISCAS 2006»
14 years 3 months ago
An asynchronous delta-sigma converter implementation
— In this paper an architecture, signal reconstruction algorithm and first-ever implementation of an asynchronous delta-sigma converter are presented. The signal reconstruction ...
Dazhi Wei, Vaibhav Garg, John G. Harris
IWANN
1993
Springer
14 years 2 months ago
Hardware Implementations of Artificial Neural Networks
Over the past decade a large variety of hardware has been designed to exploit the inherent parallelism of the artificial neural network models. This paper presents an overview of ...
Dante Del Corso
CORR
2010
Springer
83views Education» more  CORR 2010»
13 years 9 months ago
A Platform for Implementing Secure Wireless Ad Hoc Networks
: We propose a new platform for implementing secure wireless ad hoc networks. Our proposal is based on a modular architecture, with the software stack constructed directly on the E...
Gyula Farkas, Béla Genge, Piroska Haller
AICCSA
2007
IEEE
89views Hardware» more  AICCSA 2007»
14 years 4 months ago
Software/Configware Implementation of Combinatorial Algorithms
This paper discusses an approach for solving combinatorial problems by combining software and dynamically reconfigurable hardware (configware). The suggested technique avoids inst...
Iouliia Skliarova, Valery Sklyarov