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ISSS
2000
IEEE
290views Hardware» more  ISSS 2000»
14 years 2 months ago
Mapping Array Communication onto FIFO Communication - Towards an Implementation
In high-throughput real-time media processing systems, the communication between processing units is typically specified as multi-dimensional arrays. However, the implementation ...
Jeffrey Kang, Albert van der Werf, Paul E. R. Lipp...
KES
2006
Springer
13 years 9 months ago
Implementation of a FIR Filter on a Partial Reconfigurable Platform
This paper presents our implemented, synthesized and tested on demand and partial reconfiguration approaches for FIR filters using Xilinx Virtex FPGAs. Our scope is to implement a ...
Hanho Lee, Chang-Seok Choi
FPL
1997
Springer
123views Hardware» more  FPL 1997»
14 years 2 months ago
P4: A platform for FPGA implementation of protocol boosters
Protocol Boosters are functional elements, inserted anddeleted fromnetwork protocol stacks on an as-neededbasis. The Protocol Booster design methodology attempts to improve end-to-...
Ilija Hadzic, Jonathan M. Smith
DSRT
2004
IEEE
14 years 1 months ago
Implementation of Host-Based Overlay Multicast to Support of Web Based Services for RT-DVS
Growing demand for use of Internet/Web-based services in real-time distributed virtual simulation (RT-DVS) and other real-time applications is fueling extensive interest in overla...
Dennis M. Moen, J. Mark Pullen, Fei Zhao
IPPS
2007
IEEE
14 years 4 months ago
A Study of Design Efficiency with a High-Level Language for FPGAs
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
Zain-ul-Abdin, Bertil Svensson