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RECONFIG
2008
IEEE
268views VLSI» more  RECONFIG 2008»
14 years 4 months ago
Parametric, Secure and Compact Implementation of RSA on FPGA
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
Ersin Oksuzoglu, Erkay Savas
POPL
2007
ACM
14 years 10 months ago
A concurrent constraint handling rules implementation in Haskell with software transactional memory
Constraint Handling Rules (CHR) is a concurrent committedchoice constraint logic programming language to describe transformations (rewritings) among multi-sets of constraints (ato...
Edmund S. L. Lam, Martin Sulzmann
ISCAS
2003
IEEE
114views Hardware» more  ISCAS 2003»
14 years 3 months ago
On the hardware implementations of the SHA-2 (256, 384, 512) hash functions
Couple to the communications wired and unwired networks growth, is the increasing demand for strong secure data transmission. New cryptographic standards are developed, and new en...
Nicolas Sklavos, Odysseas G. Koufopavlou
ICCD
2005
IEEE
165views Hardware» more  ICCD 2005»
14 years 6 months ago
Applying Resource Sharing Algorithms to ADL-driven Automatic ASIP Implementation
Presently, Architecture Description Languages (ADLs) are widely used to raise the abstraction level of the design space exploration of Application Specific Instruction-set Proces...
Ernst Martin Witte, Anupam Chattopadhyay, Oliver S...
IPPS
1996
IEEE
14 years 2 months ago
Implementation of a SliM Array Processor
This paper presents the design and implementation of a Sliding Memory Plane (SliM) Array Processor, a mesh-connected SIMD architecture. To build the array processor, we developed ...
Hyun M. Chang, Myung Hoon Sunwoo, Tai-Hoon Cho