218 search results - page 22 / 44 » Architecture Level Power-Performance Tradeoffs for Pipelined... |
ICCD
2005
IEEE
14 years 6 months ago
2005
IEEE
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...
CORR
2006
Springer
13 years 9 months ago
2006
Springer
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
DICS
2006
14 years 21 days ago
2006
Virtual laboratories can be characterized by their long-lasting, large-scale computations, where a collection of heterogeneous tools is integrated into data processing pipelines. S...
DAC
2011
ACM
12 years 8 months ago
2011
ACM
Technology scaling allows the integration of billions of transistors on the same die but CAD tools struggle in keeping up with the increasing design complexity. Design productivit...
ASPDAC
2006
ACM
14 years 3 months ago
2006
ACM
- We propose a near optimal hardware architecture for deblocking filter in H.264/MPEG-4 AVC. We propose a novel filtering order and a data reuse strategy that result in significant...