218 search results - page 7 / 44 » Architecture Level Power-Performance Tradeoffs for Pipelined... |
CODES
2000
IEEE
14 years 1 months ago
2000
IEEE
Continued growth in chip capacity has led to new methodologies stressing reuse, not only of pre-designed processing components, but even of entire pre-designed architectures. To b...
ICCD
2005
IEEE
14 years 2 months ago
2005
IEEE
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
An approach to robust system level mixed signal design is presented based on analog platforms. The bottom-up characterization phase of platform components provides accurate perfor...
CORR
2008
Springer
13 years 8 months ago
2008
Springer
: Performing dependability evaluation along with other analyses at architectural level allows both making architectural tradeoffs and predicting the effects of architectural decisi...
VLDB
2002
ACM
13 years 8 months ago
2002
ACM
Abstract. The proliferation of mobile and pervasive computing devices has brought energy constraints into the limelight. Energy-conscious design is important at all levels of syste...