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» Architecture Normalization for Component-based Systems
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DAC
2009
ACM
14 years 9 months ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong
INFOCOM
2006
IEEE
14 years 2 months ago
Achieving Repeatability of Asynchronous Events in Wireless Sensor Networks with EnviroLog
— Sensing events from dynamic environments are normally asynchronous and non-repeatable. This lack of repeatability makes it particularly difficult to statistically evaluate the...
Liqian Luo, Tian He, Gang Zhou, Lin Gu, Tarek F. A...
ICMI
2003
Springer
133views Biometrics» more  ICMI 2003»
14 years 1 months ago
Mouthbrush: drawing and painting by hand and mouth
We present a novel multimodal interface which permits users to draw or paint using coordinated gestures of hand and mouth. A headworn camera captures an image of the mouth and the...
Chi-Ho Chan, Michael J. Lyons, Nobuji Tetsutani
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
14 years 16 days ago
VLSI Design of Multi Standard Turbo Decoder for 3G and Beyond
Turbo decoding architectures have greater error correcting capability than any other known code. Due to their excellent performance turbo codes have been employed in several trans...
Imran Ahmed, Tughrul Arslan
CASES
2006
ACM
14 years 8 days ago
Power efficient branch prediction through early identification of branch addresses
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
Chengmo Yang, Alex Orailoglu