1381 search results - page 59 / 277 » Architecture and Design of a High Performance SRAM for SOC D... |
ASPDAC
2007
ACM
14 years 3 days ago
2007
ACM
- Most image processing applications are computationally intensive and data intensive. Reconfigurable hardware boards provide a convenient and flexible solution to speed up these a...
ICMCS
2006
IEEE
14 years 2 months ago
2006
IEEE
We propose a high performance architecture for fractional motion estimation and Lagrange mode decision in H.264/AVC. Instead of time-consuming fractional-pixel interpolation and s...
IWCMC
2010
ACM
13 years 6 months ago
2010
ACM
This work presents a cross-layer modification to the DSR protocol which discovers high throughput paths on multi-hop wireless mesh networks. The modified DSR incorporates a metric...
ICDE
2009
IEEE
14 years 9 months ago
2009
IEEE
We present the architectural design and recent performance optimizations of a state of the art commercial database replication technology provided in Oracle Streams. The underlying...
CCGRID
2010
IEEE
13 years 7 months ago
2010
IEEE
—While computing speed continues increasing rapidly, data-access technology is lagging behind. Data-access delay, not the processor speed, becomes the leading performance bottlen...