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IEEEHPCS
2010
13 years 6 months ago
2010
Network-on-chip (NoC) architectures adopted for Systemon-Chip (SoC) are characterized by different trade-offs between latency, throughput, communication load, energy consumption, ...
ISVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
HOTI
2008
IEEE
14 years 2 months ago
2008
IEEE
The Network-on-Chip (NoC) paradigm has emerged as a promising solution for providing connectivity among the increasing number of cores that get integrated into both systems-onchip...
AIS
2004
Springer
14 years 1 months ago
2004
Springer
The paper proposes three dimensional extension to High Level ARchitecture (HLA) and Runtime Infrastructure (RTI) to solve several issues such as security, information hiding proble...
DAC
1992
ACM
14 years 7 days ago
1992
ACM
Designing instruction set processors and constructing their compilers are mutually dependent tasks. Piper is a high level synthesis tool of ADAS which controls the hardware-softwa...