1381 search results - page 88 / 277 » Architecture and Design of a High Performance SRAM for SOC D... |
VLSID
2005
IEEE
14 years 8 months ago
2005
IEEE
In the streaming video processing domain, the only way to meet strict performance and quality requirements and yet to provide the area- and power-wise optimal platform is to apply...
DAC
2004
ACM
13 years 12 months ago
2004
ACM
The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickne...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
Since across-chip interconnect delays can exceed a clock cycle in nanometer technologies, it has become essential in high performance designs to add flip-flops on wires with multi...
JSA
2010
13 years 3 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
SIPS
2008
IEEE
14 years 2 months ago
2008
IEEE
The development of embedded system has been toward the multicore architectures in the recent years. It raises concerns in the community of supporting programming models and langua...