1381 search results - page 98 / 277 » Architecture and Design of a High Performance SRAM for SOC D... |
ASPLOS
2008
ACM
13 years 10 months ago
2008
ACM
Device drivers commonly execute in the kernel to achieve high performance and easy access to kernel services. However, this comes at the price of decreased reliability and increas...
DAC
2007
ACM
14 years 9 months ago
2007
ACM
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...
VLSID
2003
IEEE
14 years 8 months ago
2003
IEEE
This paper quantifies the performance of typical functional unit interface designs in single-chip systems. We introduce a specific equation to guide the design of optimal module i...
FPGA
2003
ACM
14 years 1 months ago
2003
ACM
This paper proposes a new high-level technique for designing fault tolerant systems in SRAM-based FPGAs, without modifications in the FPGA architecture. Traditionally, TMR has bee...
SOSP
1993
ACM
13 years 9 months ago
1993
ACM
Research can rarely be performed on large-scale, distributed systems at the level of thousands of workstations. In this paper, we describe the motivating constraints, design princ...