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» Architecture and Implementation of PIM m
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PDP
2005
IEEE
14 years 3 months ago
Optimizing a 3D-FWT Video Encoder for SMPs and HyperThreading Architectures
In this work we evaluate the implementation of a video encoder based on the 3D Wavelet Transform optimized for HyperThreading technology and SMPs. We design several implementation...
Ricardo Fernández, José M. Garc&iacu...
KBSE
2010
IEEE
13 years 8 months ago
Analyzing security architectures
We present a semi-automated approach, Secoria, for analyzing a security runtime architecture for security and for conformance to an object-oriented implementation. Typecheckable a...
Marwan Abi-Antoun, Jeffrey M. Barnes
ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
14 years 2 months ago
Retargetable estimation scheme for DSP architecture selection
— Given the recent wave of innovation and diversification in digital signal processor (DSP) architecture, the need for quickly evaluating the true potential of considered archite...
Naji Ghazal, A. Richard Newton, Jan M. Rabaey
ISCAS
2008
IEEE
109views Hardware» more  ISCAS 2008»
14 years 4 months ago
A low-area interconnect architecture for chip multiprocessors
— A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost and flexible routing capability. To achieve a low area cost, th...
Zhiyi Yu, Bevan M. Baas
ISCAS
2007
IEEE
141views Hardware» more  ISCAS 2007»
14 years 4 months ago
Low-noise CMOS Fluorescence Sensor
— This paper reports a novel integrated circuit for fluorescence sensing. The circuit implements a differential readout architecture in order to reduce the overall noise figure...
David Sander, Marc Dandin, Honghao Ji, Nicole M. N...