Sciweavers

134 search results - page 21 / 27
» Architecture driven circuit partitioning
Sort
View
IPPS
1999
IEEE
14 years 2 days ago
Hardwired-Clusters Partial-Crossbar: A Hierarchical Routing Architecture for Multi-FPGA Systems
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing archit...
Mohammed A. S. Khalid, Jonathan Rose
DAC
1996
ACM
13 years 12 months ago
Computing Parametric Yield Adaptively Using Local Linear Models
Abstract A divide-and-conquer algorithm for computing the parametric yield of large analog circuits is presented. The algorithm targets applications whose performance spreads could...
Mien Li, Linda S. Milor
DAC
2005
ACM
13 years 9 months ago
Faster and better global placement by a new transportation algorithm
We present BonnPlace, a new VLSI placement algorithm that combines the advantages of analytical and partitioning-based placers. Based on (non-disjoint) placements minimizing the t...
Ulrich Brenner, Markus Struzyna
FPGA
1998
ACM
142views FPGA» more  FPGA 1998»
14 years 22 hour ago
A Hybrid Complete-Graph Partial-Crossbar Routing Architecture for Multi-FPGA Systems
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing archit...
Mohammed A. S. Khalid, Jonathan Rose
HPCA
2006
IEEE
14 years 8 months ago
BulletProof: a defect-tolerant CMP switch architecture
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
Kypros Constantinides, Stephen Plaza, Jason A. Blo...