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ISCA
2006
IEEE
125views Hardware» more  ISCA 2006»
14 years 2 months ago
Architectural Semantics for Practical Transactional Memory
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
Austen McDonald, JaeWoong Chung, Brian D. Carlstro...
SAC
2010
ACM
14 years 3 months ago
Design pattern implementation in object teams
Implementing the 23 Gang-of-Four design patterns in the aspectoriented programming language Object Teams/Java (OT/J) yields modularity and reusability results roughly comparable t...
João L. Gomes, Miguel P. Monteiro
CASES
2005
ACM
13 years 10 months ago
An Esterel processor with full preemption support and its worst case reaction time analysis
The concurrent synchronous language Esterel allows proto treat reactive systems in an abstract, concise manner. An Esterel program is typically first translated into other, non-s...
Xin Li, Jan Lukoschus, Marian Boldt, Michael Harde...
ESAW
2006
Springer
14 years 14 hour ago
Using Constraints and Process Algebra for Specification of First-Class Agent Interaction Protocols
Abstract. Current approaches to multi-agent interaction involve specifying protocols as sets of possible interactions, and hard-coding decision mechanisms into agent programs in or...
Tim Miller, Peter McBurney
ASPLOS
2000
ACM
14 years 21 days ago
An Analysis of Operating System Behavior on a Simultaneous Multithreaded Architecture
This paper presents the first analysis of operating system execution on a simultaneous multithreaded (SMT) processor. While SMT has been studied extensively over the past 6 years,...
Joshua Redstone, Susan J. Eggers, Henry M. Levy