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» Architecture for a Non-deterministic Simulation Machine
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IEEEPACT
2003
IEEE
14 years 1 months ago
Redeeming IPC as a Performance Metric for Multithreaded Programs
Recent work has shown that multithreaded workloads running in execution-driven, full-system simulation environments cannot use instructions per cycle (IPC) as a valid performance ...
Kevin M. Lepak, Harold W. Cain, Mikko H. Lipasti
COMPUTER
2002
103views more  COMPUTER 2002»
13 years 7 months ago
SimpleScalar: An Infrastructure for Computer System Modeling
tail defines the level of abstraction used to implement the model's components. A highly detailed model will faithfully simulate all aspects of machine operation, whether or n...
Todd M. Austin, Eric Larson, Dan Ernst
TVLSI
2008
151views more  TVLSI 2008»
13 years 7 months ago
Guest Editorial Special Section on Design Verification and Validation
ion levels. The framework also supports the generation of test constraints, which can be satisfied using a constraint solver to generate tests. A compositional verification approac...
I. Harris, D. Pradhan
APCSAC
2001
IEEE
13 years 11 months ago
Exploiting Java Instruction/Thread Level Parallelism with Horizontal Multithreading
Java bytecodes can be executed with the following three methods: a Java interpretor running on a particular machine interprets bytecodes; a Just-In-Time (JIT) compiler translates ...
Kenji Watanabe, Wanming Chu, Yamin Li
IPPS
1998
IEEE
14 years 6 days ago
A Parallel Algorithm for Minimum Cost Path Computation on Polymorphic Processor Array
This paper describes a new parallel algorithm for Minimum Cost Path computation on the Polymorphic Processor Array, a massively parallel architecture based on a reconfigurable mesh...
Pierpaolo Baglietto, Massimo Maresca, Mauro Miglia...