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TPDS
2010
174views more  TPDS 2010»
13 years 6 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
HPCA
2007
IEEE
14 years 8 months ago
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
Ricardo Fernández Pascual, José M. G...
ELPUB
2006
ACM
14 years 1 months ago
An Architecture of Authoring Environments for the Semantic Web
Among the new possibilities that the Semantic Web has enabled, the authoring task is considered as a key moment for semantic representation of knowledge to enhance publishing need...
Edgard Costa Oliveira, Mamede Lima-Marques
ICSOC
2004
Springer
14 years 1 months ago
A service-oriented architecture for digital libraries
CiteSeer is currently a very large source of meta-data information on the World Wide Web (WWW). This meta-data is the key material for the Semantic Web. Still, CiteSeer is not yet...
Yves Petinot, C. Lee Giles, Vivek Bhatnagar, Prade...
TPDS
2008
134views more  TPDS 2008»
13 years 7 months ago
Extending the TokenCMP Cache Coherence Protocol for Low Overhead Fault Tolerance in CMP Architectures
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On th...
Ricardo Fernández Pascual, José M. G...