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CODES
2010
IEEE
13 years 7 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
FPL
2007
Springer
146views Hardware» more  FPL 2007»
14 years 3 months ago
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
AROBOTS
2004
125views more  AROBOTS 2004»
13 years 8 months ago
An Architecture for Distributed Environment Sensing with Application to Robotic Cliff Exploration
Future planetary exploration missions will use cooperative robots to explore and sample rough terrain. To succeed robots will need to cooperatively acquire and share data. Here a c...
Vivek A. Sujan, Steven Dubowsky, Terrance L. Hunts...
MOBISYS
2007
ACM
14 years 8 months ago
Addressing security in medical sensor networks
We identify the security challenges facing a sensor network for wireless health monitoring, and propose an architecture called "SNAP" (Sensor Network for Assessment of P...
Kriangsiri Malasri, Lan Wang
ANCS
2007
ACM
14 years 1 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos